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<div class="title">xdprxss_hw.h File Reference</div>  </div>
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Macros</h2></td></tr>
<tr class="memitem:gaa6c84195ed3863aaf6938c1c24c3e6de"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gaa6c84195ed3863aaf6938c1c24c3e6de">XDPRXSS_HW_H_</a></td></tr>
<tr class="memdesc:gaa6c84195ed3863aaf6938c1c24c3e6de"><td class="mdescLeft">&#160;</td><td class="mdescRight">Prevent circular inclusions by using protection macros.  <a href="group__dprxss.html#gaa6c84195ed3863aaf6938c1c24c3e6de">More...</a><br/></td></tr>
<tr class="separator:gaa6c84195ed3863aaf6938c1c24c3e6de"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa90472325a71f84abe1a3a1bfec238db"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gaa90472325a71f84abe1a3a1bfec238db">XDPRXSS_LINK_BW_SET_162GBPS</a>&#160;&#160;&#160;XDP_RX_OVER_LINK_BW_SET_162GBPS</td></tr>
<tr class="memdesc:gaa90472325a71f84abe1a3a1bfec238db"><td class="mdescLeft">&#160;</td><td class="mdescRight">1.62 Gbps link rate.  <a href="group__dprxss.html#gaa90472325a71f84abe1a3a1bfec238db">More...</a><br/></td></tr>
<tr class="separator:gaa90472325a71f84abe1a3a1bfec238db"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga675f6c814d19f756cbfa98796e0b46ac"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga675f6c814d19f756cbfa98796e0b46ac">XDPRXSS_LINK_BW_SET_270GBPS</a>&#160;&#160;&#160;XDP_RX_OVER_LINK_BW_SET_270GBPS</td></tr>
<tr class="memdesc:ga675f6c814d19f756cbfa98796e0b46ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">2.70 Gbps link rate.  <a href="group__dprxss.html#ga675f6c814d19f756cbfa98796e0b46ac">More...</a><br/></td></tr>
<tr class="separator:ga675f6c814d19f756cbfa98796e0b46ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga931cc28d2f9318bfee0f2d60151bc8df"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga931cc28d2f9318bfee0f2d60151bc8df">XDPRXSS_LINK_BW_SET_540GBPS</a>&#160;&#160;&#160;XDP_RX_OVER_LINK_BW_SET_540GBPS</td></tr>
<tr class="memdesc:ga931cc28d2f9318bfee0f2d60151bc8df"><td class="mdescLeft">&#160;</td><td class="mdescRight">5.40 Gbps link rate.  <a href="group__dprxss.html#ga931cc28d2f9318bfee0f2d60151bc8df">More...</a><br/></td></tr>
<tr class="separator:ga931cc28d2f9318bfee0f2d60151bc8df"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga095994354c25ffec57830008cd335059"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga095994354c25ffec57830008cd335059">XDPRXSS_LANE_COUNT_SET_1</a>&#160;&#160;&#160;XDP_RX_OVER_LANE_COUNT_SET_1</td></tr>
<tr class="memdesc:ga095994354c25ffec57830008cd335059"><td class="mdescLeft">&#160;</td><td class="mdescRight">Lane count of 1.  <a href="group__dprxss.html#ga095994354c25ffec57830008cd335059">More...</a><br/></td></tr>
<tr class="separator:ga095994354c25ffec57830008cd335059"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd1d19e64661ce3db1ade1f5cab2fe4f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gafd1d19e64661ce3db1ade1f5cab2fe4f">XDPRXSS_LANE_COUNT_SET_2</a>&#160;&#160;&#160;XDP_RX_OVER_LANE_COUNT_SET_2</td></tr>
<tr class="memdesc:gafd1d19e64661ce3db1ade1f5cab2fe4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Lane count of 2.  <a href="group__dprxss.html#gafd1d19e64661ce3db1ade1f5cab2fe4f">More...</a><br/></td></tr>
<tr class="separator:gafd1d19e64661ce3db1ade1f5cab2fe4f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab87f0d5648bf0d231453fcfaf06daf7f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gab87f0d5648bf0d231453fcfaf06daf7f">XDPRXSS_LANE_COUNT_SET_4</a>&#160;&#160;&#160;XDP_RX_OVER_LANE_COUNT_SET_4</td></tr>
<tr class="memdesc:gab87f0d5648bf0d231453fcfaf06daf7f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Lane count of 4.  <a href="group__dprxss.html#gab87f0d5648bf0d231453fcfaf06daf7f">More...</a><br/></td></tr>
<tr class="separator:gab87f0d5648bf0d231453fcfaf06daf7f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac9df54b26ffb165819051d777a3e302f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gac9df54b26ffb165819051d777a3e302f">XDPRXSS_RX_PHY_CONFIG</a>&#160;&#160;&#160;XDP_RX_PHY_CONFIG</td></tr>
<tr class="memdesc:gac9df54b26ffb165819051d777a3e302f"><td class="mdescLeft">&#160;</td><td class="mdescRight">PHY reset and config.  <a href="group__dprxss.html#gac9df54b26ffb165819051d777a3e302f">More...</a><br/></td></tr>
<tr class="separator:gac9df54b26ffb165819051d777a3e302f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4f91a8608d7c5ac6d5463bce5689dc4d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga4f91a8608d7c5ac6d5463bce5689dc4d">XDPRXSS_PHY_POWER_DOWN</a>&#160;&#160;&#160;XDP_RX_PHY_POWER_DOWN</td></tr>
<tr class="memdesc:ga4f91a8608d7c5ac6d5463bce5689dc4d"><td class="mdescLeft">&#160;</td><td class="mdescRight">PHY power down.  <a href="group__dprxss.html#ga4f91a8608d7c5ac6d5463bce5689dc4d">More...</a><br/></td></tr>
<tr class="separator:ga4f91a8608d7c5ac6d5463bce5689dc4d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gade9ba08af5232341cdb08e1cfecbe7da"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gade9ba08af5232341cdb08e1cfecbe7da">XDPRXSS_MSA_HRES</a>&#160;&#160;&#160;XDP_RX_MSA_HRES</td></tr>
<tr class="memdesc:gade9ba08af5232341cdb08e1cfecbe7da"><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of active pixels per line (the horizontal resolution).  <a href="group__dprxss.html#gade9ba08af5232341cdb08e1cfecbe7da">More...</a><br/></td></tr>
<tr class="separator:gade9ba08af5232341cdb08e1cfecbe7da"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadb8bd23f822d2c71d2c1048fe0a63756"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gadb8bd23f822d2c71d2c1048fe0a63756">XDPRXSS_MSA_VRES</a>&#160;&#160;&#160;XDP_RX_MSA_VHEIGHT</td></tr>
<tr class="memdesc:gadb8bd23f822d2c71d2c1048fe0a63756"><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of active lines (the vertical resolution).  <a href="group__dprxss.html#gadb8bd23f822d2c71d2c1048fe0a63756">More...</a><br/></td></tr>
<tr class="separator:gadb8bd23f822d2c71d2c1048fe0a63756"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf97a3b68c4f29daf38a4fb76242de388"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gaf97a3b68c4f29daf38a4fb76242de388">XDPRXSS_NUM_STREAMS</a>&#160;&#160;&#160;4</td></tr>
<tr class="memdesc:gaf97a3b68c4f29daf38a4fb76242de388"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum number of streams supported.  <a href="group__dprxss.html#gaf97a3b68c4f29daf38a4fb76242de388">More...</a><br/></td></tr>
<tr class="separator:gaf97a3b68c4f29daf38a4fb76242de388"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gade58f59afa500e8f4ce8d57d24b8f78d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gade58f59afa500e8f4ce8d57d24b8f78d">XDPRXSS_MAX_NPORTS</a>&#160;&#160;&#160;XDP_MAX_NPORTS</td></tr>
<tr class="memdesc:gade58f59afa500e8f4ce8d57d24b8f78d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum number of RX ports.  <a href="group__dprxss.html#gade58f59afa500e8f4ce8d57d24b8f78d">More...</a><br/></td></tr>
<tr class="separator:gade58f59afa500e8f4ce8d57d24b8f78d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3a6d3739a23b0a6c4742f32e376ef3f5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga3a6d3739a23b0a6c4742f32e376ef3f5">XDPRXSS_GUID_NBYTES</a>&#160;&#160;&#160;XDP_GUID_NBYTES</td></tr>
<tr class="memdesc:ga3a6d3739a23b0a6c4742f32e376ef3f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of bytes for GUID.  <a href="group__dprxss.html#ga3a6d3739a23b0a6c4742f32e376ef3f5">More...</a><br/></td></tr>
<tr class="separator:ga3a6d3739a23b0a6c4742f32e376ef3f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga47f85cb61201d8a04e80a72de6e25576"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga47f85cb61201d8a04e80a72de6e25576">XDPRXSS_TMRCTR_RST_VAL</a>&#160;&#160;&#160;100000000</td></tr>
<tr class="memdesc:ga47f85cb61201d8a04e80a72de6e25576"><td class="mdescLeft">&#160;</td><td class="mdescRight">Timer Counter reset value.  <a href="group__dprxss.html#ga47f85cb61201d8a04e80a72de6e25576">More...</a><br/></td></tr>
<tr class="separator:ga47f85cb61201d8a04e80a72de6e25576"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr><td colspan="2"><div class="groupHeader">Register access macro definition</div></td></tr>
<tr class="memitem:ga240806c20a656dc4d273f6bcd6e024b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga240806c20a656dc4d273f6bcd6e024b8">XDpRxSs_In32</a>&#160;&#160;&#160;Xil_In32</td></tr>
<tr class="memdesc:ga240806c20a656dc4d273f6bcd6e024b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Input Operations.  <a href="group__dprxss.html#ga240806c20a656dc4d273f6bcd6e024b8">More...</a><br/></td></tr>
<tr class="separator:ga240806c20a656dc4d273f6bcd6e024b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab428d49ceaae9d2539ffa036e672d356"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gab428d49ceaae9d2539ffa036e672d356">XDpRxSs_Out32</a>&#160;&#160;&#160;Xil_Out32</td></tr>
<tr class="memdesc:gab428d49ceaae9d2539ffa036e672d356"><td class="mdescLeft">&#160;</td><td class="mdescRight">Output Operations.  <a href="group__dprxss.html#gab428d49ceaae9d2539ffa036e672d356">More...</a><br/></td></tr>
<tr class="separator:gab428d49ceaae9d2539ffa036e672d356"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacbff65f42123f46ee5085f8a37634b76"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#gacbff65f42123f46ee5085f8a37634b76">XDpRxSs_ReadReg</a>(BaseAddress, RegOffset)&#160;&#160;&#160;<a class="el" href="group__dprxss.html#ga240806c20a656dc4d273f6bcd6e024b8">XDpRxSs_In32</a>((BaseAddress) + ((u32)RegOffset))</td></tr>
<tr class="memdesc:gacbff65f42123f46ee5085f8a37634b76"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro reads a value from a DisplayPort Receiver Subsystem register.  <a href="group__dprxss.html#gacbff65f42123f46ee5085f8a37634b76">More...</a><br/></td></tr>
<tr class="separator:gacbff65f42123f46ee5085f8a37634b76"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga943ce6187f170ee3a8f0fb2ed9262e66"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__dprxss.html#ga943ce6187f170ee3a8f0fb2ed9262e66">XDpRxSs_WriteReg</a>(BaseAddress, RegOffset, Data)&#160;&#160;&#160;<a class="el" href="group__dprxss.html#gab428d49ceaae9d2539ffa036e672d356">XDpRxSs_Out32</a>((BaseAddress) + ((u32)RegOffset), (u32)(Data))</td></tr>
<tr class="memdesc:ga943ce6187f170ee3a8f0fb2ed9262e66"><td class="mdescLeft">&#160;</td><td class="mdescRight">This macro writes a value to a DisplayPort Receiver Subsystem register.  <a href="group__dprxss.html#ga943ce6187f170ee3a8f0fb2ed9262e66">More...</a><br/></td></tr>
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